Tools Used To Write This Book
- v2h.py, which converts commented Verilog files into
HTML files. Comments are processed as Markdown. Thus, the web page doesn't get
stale as the code evolves.
- verilinter, which is a small script using Verilator to lint
Verilog-2001 files. This little tool catches a lot of simple and not so simple
- Intel Quartus Prime.
The CAD tool suite for Intel (ex-Altera) FPGAs. It's smaller and easier to run
than Xilinx Vivado, and produces excellent post-elaboration and post-synthesis
diagrams, which are very useful for debugging designs.
- The particular look-and-feel of this site comes from the
It's pretty basic, but makes sure all pages
look the same on pretty much any browser.
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