Multi-Ported Memories for FPGAs

As FPGAs increase in size, designers use them to build larger systems-on-chip that require frequent data sharing, communication, queueing, and synchronization among distributed functional units. These features boil down to FIFOs and register files, which we can implement using multi-ported memories.

This page indexes research about multi-ported memories, with the most recent publications listed first.

Please direct any questions, corrections, or additions to Charles Eric LaForest, PhD at